SELECTIVE SELF-ALIGNED DOUBLE PATTERNING OF REGIONS IN AN INTEGRATED CIRCUIT DEVICE

摘要

A selective self-aligned dual patterning method. The method includes performing a single lithography operation to form a patterned mask having a narrow feature in a region of a substrate that is to a have pitch-reduced feature and a wide feature in a region of the substrate that is to have a non-pitch-reduced feature. Using the patterned mask, a template mask is formed with a first etch and the patterned mask is then removed from the narrow feature while being retained over the wide feature. The template mask is then thinned with a second etch to introduce a thickness delta in the template mask between the narrow and wide features. A spacer mask is then formed and the thinned narrow template mask is removed to leave a pitch double spacer mask while the thick wide template mask feature is retained to leave a non- pitch reduced mask.