发明名称 |
MODIFIED PILLAR DESIGN FOR IMPROVED FLIP CHIP PACKAGING |
摘要 |
A pillar for flip chip interconnect in an electronic package. The pillar includes an electrically conductive material and a solder wicking inhibitor deposited on the sides of the pillar. The pillar also includes an exposed face for contacting the electrically conductive material and solder material on the substrate. In another embodiment, a method of forming a pillar composed of an electrically conductive material which inhibits solder wicking is provided. The method includes coating the pillar with a solder wicking inhibitor and polishing a face of the pillar to expose the underlying electrically conductive material. |
申请公布号 |
WO2010141624(A3) |
申请公布日期 |
2011.03.03 |
申请号 |
WO2010US37120 |
申请日期 |
2010.06.02 |
申请人 |
QUALCOMM INCORPORATED;BCHIR, OMAR, J.;ZHAO, LILY |
发明人 |
BCHIR, OMAR, J.;ZHAO, LILY |
分类号 |
H01L23/00;H01L21/56;H01L21/60;H01L23/498 |
主分类号 |
H01L23/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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