Bereitstellen von Zustandsspeicher in einem Prozessor für Systemmanagement-Modus
摘要
In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.
申请公布号
DE102010034555(A1)
申请公布日期
2011.03.03
申请号
DE20101034555
申请日期
2010.08.17
申请人
INTEL CORPORATION
发明人
NATU, MAHESH S.;GANESAN, BASKARAN;RANGARAJAN, THANUNATHAN;KUMAR, MOHAN J.;DOSHI, GAUTAM B.;PARTHASARATHY, RAJESH S.;DATTA, SHAMMANNA M.;BINNS, FRANK;MURTHY, RAJESH NAGARAJA;SWANSON, ROBERT C.