Leistungshalbleiteranordnung mit einem Ballastwiderstandsbereich

摘要

A power semiconductor device has integral source/emitter ballast resistor regions (20). The gate electrode (14,16) has partial gate structures spaced apart from each other. Emitter resistors are provided beneath sidewall spacers (19) on the ends of the gate structures. The ballast resistor regions have little effect on the threshold voltage under normal operating conditions, but rapidly saturate the device during short circuit conditions.