发明名称 Resistance change memory
摘要 A resistance change memory includes first and second memory cell arrays which are adjacent to each other in a first direction, first and second reference cell arrays paired with the first and second memory cell arrays, a first sense amplifier shared by the first and second memory cell arrays and arranged between the first and second memory cell arrays, a first data bus which transfers data of a first readout cell in the first memory cell array to the first sense amplifier, and a second data bus which transfers data of a first reference cell in the first reference cell array to the first sense amplifier. The first and second data buses run on both sides of the first sense amplifier in a second direction and cross each other while sandwiching the first sense amplifier.
申请公布号 US7898845(B2) 申请公布日期 2011.03.01
申请号 US20090404115 申请日期 2009.03.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TSUCHIDA KENJI
分类号 G11C11/00 主分类号 G11C11/00
代理机构 代理人
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