| 摘要 |
The present invention is to provide a semiconductor integrated circuit device provided with a sufficient margin to variations of input waveforms. For example, the semiconductor integrated circuit device is provided with a clock and data determination circuit receiving an input data signal and a clock signal and outputting a recovered data signal, a first phase comparison signal and a second phase comparison signal and a clock signal generating circuit generating the clock signal with a phase corrected based on the first phase comparison signal and the second phase comparison signal. The clock and data determination circuit latches the input data signal in synchronization with the clock signal using a plurality of thresholds as determination reference and generates two kinds of candidates composed of combination of a recovered data signal and phase comparison signals by processing a latch result. Further, one of the two kinds of candidates is selected by a selector circuit based on a symbol of a recovered data signal at a previous cycle.
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