发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To relax stress to a memory cell and increase reliability of a memory. <P>SOLUTION: For data erase from an electrically erasable and programmable non-volatile memory cell, the following operations are performed: (1) an erase operation to apply an erase pulse voltage to a memory cell for data erase; (2) an erase verify operation to verify whether data erase is completed; and (3) a step-up operation to increase the erase pulse voltage by a certain step-up voltage if data erase is not completed. A control unit controls voltages so that at least a first erase pulse voltage initially generated in the erase operation has a longer rise time than that of a second erase pulse voltage generated subsequent to the first erase pulse voltage. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011040142(A) 申请公布日期 2011.02.24
申请号 JP20090275695 申请日期 2009.12.03
申请人 TOSHIBA CORP 发明人 SHIINO YASUHIRO;KONO DAISUKE;IRIEDA SHIGEFUMI;NAKAI TAKEMICHI;TAKAHASHI SAKANOBU
分类号 G11C16/02;G11C16/06 主分类号 G11C16/02
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