发明名称 |
SEMICONDUCTOR MEMORY DEVICE HAVING DEVICE FOR CONTROLLING BIT LINE LOADING AND IMPROVING SENSING EFFICIENCY OF BIT LINE SENSE AMPLIFIER |
摘要 |
A semiconductor memory device includes a memory cell array block including a plurality of memory cells each connected to one of a plurality of bit lines and one of a plurality of word lines, a sense amplifier connected to a half of the plurality of bit lines, the sense amplifier for sensing and amplifying a voltage between each of the half of the bit lines and a corresponding complementary bit line; and a dummy block connected to the half of the plurality of bit lines of the memory cell array block, the dummy block for controlling a load on the memory cell array block to be different from a load on the dummy block according to a dummy load signal.
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申请公布号 |
US2011044121(A1) |
申请公布日期 |
2011.02.24 |
申请号 |
US20100860484 |
申请日期 |
2010.08.20 |
申请人 |
KIM JOUNG-YEAL;CHANG SOO-BONG;JANG SEONG-JIN;KWAK JIN-SEOK;SHIN DONG-HAK |
发明人 |
KIM JOUNG-YEAL;CHANG SOO-BONG;JANG SEONG-JIN;KWAK JIN-SEOK;SHIN DONG-HAK |
分类号 |
G11C7/06 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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