| 摘要 |
Some embodiments of the present invention provide a system that maps an address to an entity, wherein the mapping interleaves addresses between a number of entities. During operation, the system receives an address A from a set of X consecutive addresses, wherein the address A is to be mapped to an entity E in a set of Y entities, and wherein Y need not be a power of two. Next, the system obtains F=floor(log2(Y)) and C=ceiling(log2(Y)). The system then calculates L, which equals the value of the F least-significant bits of A. The system also calculates M, which equals the value of the C most-significant bits of A. Next, the system calculates S=L+M. Finally, if S<Y, the system sets E=S. Otherwise, if S≧Y, the system sets E=S−Y. |
