发明名称 MEASUREMENT OF PARTIALLY DEPLETED SILICON-ON-INSULATOR CMOS CIRCUIT LEAKAGE CURRENT UNDER DIFFERENT STEADY STATE SWITCHING CONDITIONS
摘要 A test system for determining leakage of an integrated circuit (IC) under test includes a test circuit formed on a same chip as the IC, the test circuit further having pulse generator configured to generate a high-speed input signal to the IC at a plurality of selectively programmable duty cycles and frequencies, the IC powered from a first power source independent from a second power source that powers the pulse generator; and a current measuring device configured to measure leakage current through the IC in a quiescent state, and current through the IC in an active switching state, responsive to the high-speed input signal at a plurality of the programmable duty cycles and frequencies, and wherein the test circuit utilizes only external low-speed input and output signals with respect to the chip.
申请公布号 US2011043243(A1) 申请公布日期 2011.02.24
申请号 US20090544730 申请日期 2009.08.20
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BHUSHAN MANJUL;KETCHEN MARK B.
分类号 G01R31/26;G01R31/02 主分类号 G01R31/26
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