| 发明名称 |
Wiring circuit substrate |
| 摘要 |
<p>The invention relates to a wiring circuit substrate, comprising: a first metal layer in which conductor circuit traces (32) are formed; etched metal protrusions that are in direct contact with said first metal layer; and a second metal layer that is formed on side surfaces of said protrusions, wherein said second metal layer is formed of a solder-plated layer.</p> |
| 申请公布号 |
EP2288244(A1) |
申请公布日期 |
2011.02.23 |
| 申请号 |
EP20100011151 |
申请日期 |
2000.10.11 |
| 申请人 |
TESSERA INTERCONNECT MATERIALS, INC. |
发明人 |
TOMO, IJIMA;MASAYUJI, OHSAWA |
| 分类号 |
H05K3/40;H01L21/48;H01L23/498;H05K3/06;H05K3/46 |
主分类号 |
H05K3/40 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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