| 摘要 |
1411803 Recording use of television receivers VIDEO RESEARCH KK 18 Oct 1972 [19 Oct 1971] 48015/72 Heading H3Q A television monitor system of the kind intended to provide a record of the channels to which television receivers are tuned comprises a plurality of pick-up circuits 51, 52, 53 each allotted to monitor a respective television receiver TV1, TV2, TV3 to receive sound if signals from the monitored TV receives, a first gate circuit 55 connected to each of the output terminals of the pick-up circuits, a television channel reception circuit 15 for receiving television broadcast, a comparator 19 connected to the first gate 55 and to the TV reception circuit 15, an oscillator 1 for producing character signals, bit signals and control signals, a second gate circuit 21 connected to the comparator and to the oscillator and a counter 23 for counting pulses supplied from the oscillator via the second gate circuit. The system further comprises a channel sweep circuit 25 for scanning channels in the channel reception circuit 15, memory circuits 31-33 as many as the monitored TV receivers and connected to the output terminals of the counter, a first AND gate 44 connected to the counter and the oscillator to provide the instantaneous count result in the counter when the signals from the counter and the character and bit signals from the oscillator are simultaneously supplied to the first AND gate 44 and a plurality of second AND gates 41-43 each connected to one of the memories and to the oscillator to provide preceding count result when signals from one of the memory circuits and the character and bit signal from the oscillator are simultaneously supplied to the second gate. The system still further comprises a first OR gate 45 connected to the second AND gates, an exclusive OR gate 13 connected to the first AND gate 44 and to the OR gate 45, recording means 61, 65, 67 connected to the OR gate 45 to record information from the memories and a control pulse generator 11 the input terminals of which are connected to the exclusive OR circuit 13 and the oscillator 1 while the output terminals of the control pulse generator 11 are connected to the first gate circuit 55, the counter 23, the recording means 61, 65, 67, the memories 31-33 and the second AND gates 41-43 to provide control signals. The channel sweep circuit 25 includes 16 gate circuits (101, Fig. 3, not shown) which provide D.C. voltages to a variable capacitance diode in the tuner 17 so as to successively scan the available channels tuned by the TV channel reception circuit 15. When the 4-5 MHz sound i.f. signal from circuit 15 corresponds to the 4À5 MHz sound i.f. signal received by the TV receiver TV1 or TV2 or TV3 which is monitored as determined by gate 55 and pulse generator 11 the count of pulses via gate 21 to the counter 23 is stopped. The count in the counter 23 then corresponds to the channel to which the monitored receiver is tuned. The memory 31-33 stores the preceding content of the counter and if the counter content and the memory do not coincide this means that the monitored receiver has been switched to another channel. The content of the memory is read out and is passed through one of the AND gates 41-43 under control of the character signals and bit signals and is then passed via OR gates 45, 59 and is shaped in a recording signal shaping circuit 61 for recording in the tape recorder in synchronism with the motor drive operation. The system is provided with a power supply so that its operation can be continued during interruption of the commercial power supply. Information concerning the power stoppage is recorded through the OR gate 59 since when the power is stopped or the scanned receiver is inoperative "0" channel is recorded. A signal representing time is produced by an AND gate 27. Information concerning the start and stop of the system, any occurrence of interruption of the commercial power source, clock correction, the number of the area in which the audience data is collected, the number of the home to which the monitored receivers belong is recorded through circuitry disclosed (Fig. 8, not shown). The system may be constructed as a semi-conductor integrated circuit. |
