发明名称 Method and apparatus for implementing a processor interface block with an electronic design automation tool
摘要 An electric design automation (EDA) tool for generating a design of a system on a field programmable gate array (FPGA) includes a library that includes a processor interface block selectable by a designer to represent a component in the design that is accessible to a processor. The EDA tool also includes a processor interface circuitry generation unit to automatically generate circuitry in the design to support the processor interface block without input from the designer.
申请公布号 US7895549(B1) 申请公布日期 2011.02.22
申请号 US20070986606 申请日期 2007.11.23
申请人 ALTERA CORPORATION 发明人 PERRY STEVEN
分类号 G06F17/50 主分类号 G06F17/50
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