AMPLIFIERS WITH IMPROVED LINEARITY AND NOISE PERFORMANCE

摘要

Amplifiers with improved linearity and noise performance are described. In an exemplary design, an apparatus includes first through sixth transistors. The first transistor (320) receives an input signal and provides an amplified signal. The second transistor (360) receives the amplified signal and provides signal drive for an output signal. The third transistor (310) receives the input signal and provides an intermediate signal. The fourth transistor (340) provides bias for the third transistor (310) in a high linearity mode. The fifth transistor (350) receives the intermediate signal and provides signal drive for the output signal in a low linearity mode. The third (310) and fourth (340) transistors form a deboost path that is enabled in the high linearity mode to improve linearity. The third (310) and fifth (350) transistors form a cascode path that is enabled in the low linearity mode to improve gain and noise performance. The sixth transistor (330) generates distortion component used to cancel distortion component from the first transistor (320)