发明名称 Apparatus and method for performing fused multiply add floating point operation
摘要 A data processing apparatus is arranged to perform a fused multiply add operation. The apparatus 100 has multiplying circuitry 110 configured to multiply operands B and C to generate a product B*C having a high order portion 160 and a low order portion 170. The apparatus has adding circuitry 130 configured to: (i) add an operand A to one of the high order portion 160 and the low order portion 170 to generate an intermediate sum value; and (ii) add the intermediate sum value to a remaining one of the high order portion 160 and the low order portion 170 to generate a result A+B*C.
申请公布号 US2011040815(A1) 申请公布日期 2011.02.17
申请号 US20090461478 申请日期 2009.08.12
申请人 ARM LIMITED 发明人 PENTON ANTONY JOHN;CRASKE SIMON JOHN;CAULFIELD IAN MICHAEL
分类号 G06F7/487 主分类号 G06F7/487
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