发明名称 Method and apparatus for mode selection for high voltage integrated circuits
摘要 <p>A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost of an additional terminal. In one embodiment, ordinary low voltage circuitry monitors the voltage on the terminal that normally is exposed to high voltage. The configuration of a simple voltage detector and an ordinary latch allows easy entry into the test and trimming mode when the integrated circuit is not in the intended application, but prohibits entry into the test and trimming mode when the integrated circuit operates in the intended application.</p>
申请公布号 EP2285001(A1) 申请公布日期 2011.02.16
申请号 EP20100176898 申请日期 2004.07.28
申请人 POWER INTEGRATIONS, INC. 发明人 DJENGUERIAN, ALEX B.;SMITH, WILLIAM B.;WONG, KENT;WANG, ZHAO-JUN
分类号 H01L27/04;H03K19/173;H01L21/82;H01L21/822;H02M1/08;H02M3/335 主分类号 H01L27/04
代理机构 代理人
主权项
地址