发明名称 |
Various methods and apparatuses for effective yield enhancement of good chip dies having memories per wafer |
摘要 |
A method and apparatus are described in which an optimal configuration of memory instances is determined. The optimal configuration of memory instances to be fabricated with built-in repair capacity and memory instances that are non-repairable may provide a maximum number of good chip dies per wafer. An amount of memory instances to be fabricated with built-in repair capacity as well as a remaining amount of memory instances to be fabricated without any built-in repair components in the integrated circuit design is determined relative to achieving the maximum number of good chip dies per wafer for a given defect density and wafer area. The amount of good dies produced per fabricated wafer for a populated amount of memories with built-in repair components is determined to be between an amount established by a minimum limit for the die area up to the amount established by a maximum limit for the die area.
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申请公布号 |
US7890900(B2) |
申请公布日期 |
2011.02.15 |
申请号 |
US20080194454 |
申请日期 |
2008.08.19 |
申请人 |
SYNOPSYS, INC. |
发明人 |
ALEKSANYAN KAREN;VARDANIAN VALERY;ZORIAN YERVANT |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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