发明名称 Hybrid delta-sigma ADC
摘要 A hybrid delta sigma ADC architecture and method is disclosed to implement a high-resolution delta-sigma modulator with a single-bit output. The system contains a low-order multi-bit analog noise-shaping loop, followed by a high-order single-bit digital modulator. The combination simplifies the analog modulator, and allows the use of most of the full-scale input range.
申请公布号 US7889108(B2) 申请公布日期 2011.02.15
申请号 US20090436813 申请日期 2009.05.07
申请人 ASAHI KASEI MICRODEVICES CORPORATION 发明人 HAMASHITA KOICHI;TEMES GABOR C;WANG YAN
分类号 H03M3/00 主分类号 H03M3/00
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