| 摘要 |
PURPOSE:To constitute the entire circuit with standard digital circuits by providing a counter reset by the 1st clock, a memory storing a part of bits of the said counter every time the 2nd clock is inputted and a detector detecting the coincidence between the memory value and the bit of the counter. CONSTITUTION:A bit number (n) of the counter 11 and a bit number (m) of the memory are selected as m=n=3 in convenience. The clock in figure (a) is inputted from an input point 16 to the counter 11 and the count-up is repeated by using a reference clock in figure (e) from an input point 14. The memory 12 stores the value of the counter 11 every time the 2nd clock is inputted in figure (f) from an input point 15. Figures h, i, j show a memory value corresponding to 3-bit of the counter 11 and the value at the trailing of the clock shown in the figure (f) is stored. The value and each bit of the counter 11 are compared by a coincidence circuit 13. The circuit 13 outputs a signal when all the corresponding bits are coincident. Thus, the said output signal has a period of the reference clock and is a signal whose phase is matched with the said 2nd clock. The large scale integration is facilitated. |
