发明名称 METHOD FOR EVALUATING SEMICONDUCTOR INTEGRATED CIRCUIT, SEMICONDUCTOR INTEGRATED CIRCUIT AND DEVICE FOR EVALUATING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a method for evaluating a semiconductor integrated circuit, capable of performing at high speed both detection of a defective transistor in a large scale semiconductor integrated circuit and measurement of characteristics of the defective transistor. <P>SOLUTION: A determination (threshold Vth determination) whether a threshold Vth of each transistor Tr in cell arrays 11 and 12 to be evaluated deviates from a distribution within 5&sigma; relative to a normal distribution curve of the threshold Vth is made, by using a plurality of sense amplifiers SA_A and SA_B. Measurement of transistor characteristics is performed to each transistor Tr, having a threshold Vth deviated from the distribution within 5&sigma;. When determination of the threshold Vth is made, in order to avoid the occurrence of dispersion in determination results of the threshold Vth due to an offset difference between the plurality of sense amplifiers SA_A and SA_B, a reference current REF is set, according to the offset difference between the plurality of sense amplifiers SA_A and SA_B so that determination results of the plurality of sense amplifiers to the same input are matched. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011029406(A) 申请公布日期 2011.02.10
申请号 JP20090173549 申请日期 2009.07.24
申请人 TOPPAN PRINTING CO LTD 发明人 DAIHISA HIROKI;ASANO MASAMICHI;KONDO HIROSHI
分类号 H01L21/66;G01R31/28;G11C29/12;G11C29/56;H01L21/822;H01L21/8244;H01L27/04;H01L27/11 主分类号 H01L21/66
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