发明名称 |
MULTI PROCESSOR SYSTEM HAVING MULTI COMMAND SET OPERATION AND PRIORITY OPERATION FUNCTION |
摘要 |
PURPOSE: A multi processor system including a multi command set operation and a primary processing operation function are provided to reduce a timing overhead by a frequent interrupt, thereby increasing a read/write operation performance. CONSTITUTION: A multiport semiconductor memory device(300) includes a mailbox and a shared memory area. The first processor(100) lights a multi command which commands read/write operations as a multi command set in a command area of the shared memory area and informs a multi command write message through the mailbox. The second processor(200) recognizes a reception of the multi command through the mailbox and orderly performs read/write operations according to the multi command set.
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申请公布号 |
KR20110013868(A) |
申请公布日期 |
2011.02.10 |
申请号 |
KR20090071549 |
申请日期 |
2009.08.04 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KWON, JIN HYOUNG |
分类号 |
G06F9/48;G06F1/32;G06F12/00 |
主分类号 |
G06F9/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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