发明名称 MULTISTAGE PACKAGE FOR ELECTRONIC PART
摘要 PURPOSE:To package electronic parts in a three-dimensional pattern with respect to a packaging plane and to improve the packaging density of the electronic parts, by the constitution wherein pins are protruded downward from each package main body, pinholes are provided at the upper ends of the pins, and a plurality of the packages are laminated in the up and down directions. CONSTITUTION:A package 10 has a disk shaped package main body 1 having a sleeve at the peripheral part. A required wiring pattern 3 is formed on the upper surface of the package main body 1 with a conductor film. Leads 5 of a semiconductor device 4, which is mounted on the surface of the package main body 1, are connected to the wiring pattern 3. Meanwhile a plurality of pins 6 are arranged at the sleeve 2 on the periphery of the package main body 1 so that the pins are protruded downward. When a plurality of the packages 10 formed in this way are laminated in the up and down direction, electronic parts such as the semiconductor device 4, which are mounted on the packages 10, are electrically connected one another through the wiring pattern 3, the pins 6 and pinholes 7. Thus the specified circuit is constituted.
申请公布号 JPS63107146(A) 申请公布日期 1988.05.12
申请号 JP19860251861 申请日期 1986.10.24
申请人 NEC CORP 发明人 TODA MARIKO
分类号 H01L23/50;H01L23/04;H01L23/52 主分类号 H01L23/50
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