| 摘要 |
PURPOSE:To attain a fine step of change in the frequency division ratio and to increase the upper limit frequency to be extracted by inputting an input pulse signal to a multiplexer while being converted into a polyphase signal and giving the said signal to a programmable counter while its interval of the phases is varied in extracting the signal from the multiplexer. CONSTITUTION:A pulse signal to be frequency-divided is converted into a polyphase signal by a polyphase signal forming circuit 20, one of the results is selected by a multiplexer 30 and given to a programmable counter 40, where the number of leading or trailing edges is counted, and every time its count reaches a setting value (M-1) set by a 1st setting device 50, a frequency division signal is outputted to a terminal 41. The counter 40 loads the setting value (M-1) again by using the frequency division signal, enters the next counting and outputs the frequency division signal. Moreover, the frequency division signal is outputted at an output terminal 60 and given to a latch control circuit having a differentiation function, where the signal becomes a single pulse Pi, which is given to a latch circuit 80. The latch circuit 80 latches the sum of a numeral N set by a 2nd setting device 100 and a value of a latch output signal of the latch circuit 80 by an adder 90 every time the counter 40 outputs a frequency division signal to control the multiplexer 30 switchingly.
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