| 摘要 |
<p>PURPOSE:To dissolve the phase shift of a PLL circuit by dividing a dividing circuit in a horizontal synchronism separating circuit when a track jump pulse is generated. CONSTITUTION:When a frame synchronizing cycle becomes a fixed interval, a discrimination output becomes a high level, a switching control output is delivered from a track jump signal control circuit 27, a track jump pulse is not generated, and the output of a first dividing circuit 8 is reset. When the track jump pulse is made to generate during a ranking period at the vertical of a MUSE signal, a flip flop output becomes a low level, when a frame synchronizing pulse is generated immediately after, it becomes a high level, the resetting is released, and it is reset by the frame synchronizing pulse. For the first dividing circuit 8, a phase is regulated by a horizontal synchronous pulse after track jumping.</p> |
