发明名称 Chip-stacked package structure and method for manufacturing the same
摘要 A chip stacked package structure and applications are provided. The chip-stacked package structure includes a main substrate, a baseboard substrate, and a molding compound. The main substrate has a substrate and a first chip. The substrate has a first surface and a second surface opposite to the first surface. The first chip is disposed on the first surface and electrically connected to the substrate via first bumps. The baseboard substrate has a third surface and a fourth surface faced towards the substrate. The baseboard substrate includes a core layer having a plurality of first through holes and a first accommodation space in which the first chip is received. The second chip is disposed on the third surface of the baseboard substrate. The molding compound is used to encapsulate the main substrate, and the baseboard substrate.
申请公布号 US7884486(B2) 申请公布日期 2011.02.08
申请号 US20090648655 申请日期 2009.12.29
申请人 CHIPMOS TECHNOLOGY INC. 发明人 PAN YU-TANG;CHOU SHIH-WEN
分类号 H01L23/48;H01L23/52;H01L29/40 主分类号 H01L23/48
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