发明名称 Non-volatile memory array with resistive sense element block erase and uni-directional write
摘要 In accordance with various embodiments, a column of non-volatile memory cells is connected between opposing first and second control lines. A fixed reference voltage is applied to the second control line. The memory cells are simultaneously programmed to a first resistive state by applying a first voltage to the first control line that is greater than the fixed reference voltage. Less than all of the memory cells are subsequently simultaneously programmed to a different, second resistive state by applying a second voltage to the first control line that is less than the fixed reference voltage, so that at the conclusion of the respective programming steps a first portion of the memory cells along said column are at the first resistive state and a second portion of the memory cells along said column are at the second resistive state.
申请公布号 US7885097(B2) 申请公布日期 2011.02.08
申请号 US20090501077 申请日期 2009.07.10
申请人 SEAGATE TECHNOLOGY LLC 发明人 REED DANIEL S.;LU YONG;CARTER ANDREW JOHN;LI HAI
分类号 G11C7/12;G11C8/12;G11C11/02;G11C11/14;G11C11/16 主分类号 G11C7/12
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