MULTIPORT MEMORY AND CONTROL METHOD OF THE SAME

摘要

PROBLEM TO BE SOLVED: To facilitate paging of a multiport memory. SOLUTION: The multiport memory includes: a plurality of memory cores having memory cells; a plurality of input/output ports each having clock terminals for receiving a clock signal; address terminals for receiving address signals synchronized with the clock signal and provided to select the memory cells and data input/output terminals for inputting and outputting data signals; a control circuit corresponding to the memory cores, selecting either of the address signals provided from the input/output ports and accessing the memory cells in accordance with the selected address signals; and buffers for holding data corresponding to a plurality of the memory cells. The data read and written from and to the memory cells are transferred to the data input/output terminals and memory cells via the buffers. COPYRIGHT: (C)2011,JPO&INPIT