| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory device which attains high-frequency operation and high speed. SOLUTION: The semiconductor memory device includes: an SRAM core 47 having a plurality of memory cells; an address counter 41a incrementing addresses including a row address and a column address in synchronization with clock, and outputting the incremented addresses sequentially; a counter address detecting circuit 42a detecting an address before the row address is switched in an address output from the address counter 41a and outputting the detected signal; and an equalization control circuit 46a performing pre-charge operation for a bit line connected to a memory cell in accordance with a detected signal output from the counter address detecting circuit 42a. COPYRIGHT: (C)2011,JPO&INPIT
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