发明名称 |
METHOD AND SYSTEM FOR POWER-EFFICIENT AND NON-SIGNAL-DEGRADING VOLTAGE REGULATION IN MEMORY SUBSYSTEMS |
摘要 |
<p>Embodiments of the present invention are directed to a memory subsystem comprising a memory controller, multiple memory modules interconnected with the memory controller by one or more communications media, each memory module comprising a substrate to which multiple memory chips are mounted and electronically connected to the communications media, and a power-supply signal routed to two or more voltage regulators within the memory subsystem from a system power supply, the voltage regulators outputting two or more internal power signals, each power signal providing a different, regulated voltage, which are routed to each of the memory chips. Another embodiment of the present invention is directed to a memory module comprising a substrate to which multiple memory chips are mounted and two or more voltage regulators mounted to, or fabricated within, the substrate.</p> |
申请公布号 |
WO2011014158(A1) |
申请公布日期 |
2011.02.03 |
申请号 |
WO2009US51875 |
申请日期 |
2009.07.27 |
申请人 |
HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.;BACCHUS, REZA, M.;NGUYEN, VINCENT;BENEDICT, MELVIN, K. |
发明人 |
BACCHUS, REZA, M.;NGUYEN, VINCENT;BENEDICT, MELVIN, K. |
分类号 |
G06F1/26;G06F1/32;G06F12/00;G06F13/14;G06F13/16 |
主分类号 |
G06F1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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