| 摘要 |
PROBLEM TO BE SOLVED: To provide a power-on reset circuit technology with which a power-on reset signal can be reliably generated without malfunction and the power-on reset signal, which is turned on for an arbitrary fixed time regardless of a power supply voltage or variations in manufacturing, is generated within a shorter time than the prior arts. SOLUTION: A power-on reset circuit includes: a charge-up circuit 1 comprised of a P-type MOS transistor P1 and a first capacitor C1; a NOR circuit NOR1 which operates by input of output from the charge-up circuit 1 and a power-on reset signal POR; an inverter circuit INV1 connected with the NOR circuit NOR1 in series; a capacitor C2 connected between input of the NOR circuit NOR1 and output of the inverter circuit INV1; a counter circuit 2 configured to count a clock CK; a clock selector circuit 3 configured to select whether to output or inhibit the clock on the basis of output from the counter circuit 2; and an inverter circuit INV2 connected to the output of the counter circuit 2 to output the power-on reset signal POR. The counter circuit 2 is comprised of flip-flops of one or more stages. COPYRIGHT: (C)2011,JPO&INPIT
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