发明名称 BRANCH PREDICTOR FOR SETTING PREDICATE FLAG TO SKIP PREDICATED BRANCH INSTRUCTION EXECUTION IN LAST ITERATION OF LOOP PROCESSING
摘要 A processor simultaneously issues instructions to multiple threads in a same instruction execution cycle. An instruction issuer controls issuance of an instruction for each of the multiple threads. A detector detects, for each of the multiple threads, whether a loop processing is currently being executed. A unit causes the instruction issuer to increase a number of instructions to be issued when the detector detects that the loop processing is currently being executed.
申请公布号 US2011029763(A1) 申请公布日期 2011.02.03
申请号 US20100900975 申请日期 2010.10.08
申请人 PANASONIC CORPORATION 发明人 TANI TAKENOBU
分类号 G06F9/32;G06F9/44 主分类号 G06F9/32
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