发明名称 |
Methods for fabricating improved gate dielectrics |
摘要 |
Disclosed are a variety of methods for increasing the relative thickness in the peripheral or edge regions of gate dielectric patterns to suppress leakage through these regions. The methods provide alternatives to conventional GPOX processes and provide the improved leakage resistance without incurring the degree of increased gate electrode resistance associated with GPOX processes. Each of the methods includes forming a first opening to expose an active area region, forming an oxidation control region on the exposed portion and then forming a second opening whereby a peripheral region free of the oxidation control region is exposed for formation of a gate dielectric layer. The resulting gate dielectric layers are characterized by a thinner central region surrounded or bounded by a thicker peripheral region.
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申请公布号 |
US7879737(B2) |
申请公布日期 |
2011.02.01 |
申请号 |
US20100801115 |
申请日期 |
2010.05.24 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
SOHN WOONG-HEE;CHOI GIL-HEYUN;KIM BYUNG-HEE;LEE BYUNG-HAK;CHA TAE-HO;PARK HEE-SOOK;PARK JAE-HWA;SEONG GEUM-JUNG |
分类号 |
H01L21/31 |
主分类号 |
H01L21/31 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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