发明名称 Modeling silicon-on-insulator stress effects
摘要 A method and system for modeling silicon-on-insulator shallow trench isolation stress effect is described. The method includes creating instance parameters that define dimensions of a body-tie enclosure of gate and gate-end. The instance parameters are added to a netlist. The netlist and a lookup table are used to generate a mobility multiplier. The mobility multiplier is added to the netlist and a circuit simulation program runs the netlist having the instance parameters and the mobility multiplier.
申请公布号 US7882452(B2) 申请公布日期 2011.02.01
申请号 US20070847999 申请日期 2007.08.30
申请人 HONEYWELL INTERNATIONAL INC. 发明人 VOGT ERIC E.;MICHAELSON GREG A.
分类号 G06F17/50 主分类号 G06F17/50
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