发明名称 Secured verification of configuration data for field programmable gate array devices
摘要 A method and apparatus for providing automated and secured verification of configuration data for a volatile progrannmable electronic device, such as an FPGA, is disclosed. A configurator including at least one memory unit, such as a ROM or EEPROM, contains a configuration file, which file is transferred to the volatile programmable electronic device or FPGA on demand. Data from the configuration file is compared with data from a separate custodial file, which custodial file is substantially identical to the configuration file and resides in a location separate from the memory unit or units that store the actual configuration file. In some instances the comparison is made before any actual loading of the configuration file into the FPGA occurs, whereby loading is prohibited if no match is confirmed, while in other instances the FPGA is configured using the configuration file and is then shut down if no match is later confirmed.
申请公布号 US7878902(B2) 申请公布日期 2011.02.01
申请号 US20030621873 申请日期 2003.07.16
申请人 IGT 发明人 MATTICE HAROLD E.;WILDER RICHARD;GRISWOLD CHAUNCEY W.
分类号 A63F9/24;A63F13/00;G06F1/00;G06F9/445;G06F12/14;G06F17/00;G06F21/00;G07F5/00;G07F17/32 主分类号 A63F9/24
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