发明名称 Method and apparatus for synchronizing memory enabled systems with master-slave architecture
摘要 Embodiments of the invention generally provide a system, method and memory device for accessing memory. One embodiment includes synchronization circuitry configured to determine timing skew between a first memory device and a second memory device, and introduce a delta delay to at least one of the first memory device and the second memory device to adjust the timing skew.
申请公布号 US7882324(B2) 申请公布日期 2011.02.01
申请号 US20070928633 申请日期 2007.10.30
申请人 QIMONDA AG 发明人 SCHNELL JOSEF;HUMMLER KLAUS;OH JONG HOON;ELLIS WAYNE FREDERICK;KIM JUNG PILL;KIEHL OLIVER;BELDIMAN OCTAVIAN;COLLINS LEE WARD
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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