发明名称 Integration of a floating body memory on SOI with logic transistors on bulk substrate
摘要 A method and the resultant memory is described for forming an array of floating body memory cells and logic transistors on an SOI substrate. The floating bodies for the cells are formed over the buried oxide, the transistors in the logic section are formed in the bulk silicon.
申请公布号 US7880231(B2) 申请公布日期 2011.02.01
申请号 US20090586133 申请日期 2009.09.16
申请人 INTEL CORPORATION 发明人 CHANG PETER L. D.
分类号 H01L27/01 主分类号 H01L27/01
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