发明名称 |
Method and resulting structure DRAM cell with selected inverse narrow width effect |
摘要 |
A shallow trench isolation structure for integrated circuits. The structure includes a semiconductor substrate and a buffered oxide layer overlying the semiconductor substrate. A pad nitride layer is overlying the buffered oxide layer. An implanted region is formed around a perimeter of the trench region. A trench region is formed within the semiconductor substrate. The trench region has a bottom width of less than 0.13 microns and an upper width of less than 0.13 microns. A rounded edge region is within a portion of the semiconductor substrate surrounding a periphery of the trench region. The rounded edges have a radius of curvature greater than about 0.02 um. A planarized high density plasma fill material is formed within the trench region. The structure has a P-well region within the semiconductor substrate and bordering a vicinity of the trench region. A channel region is within the P-well region within the semiconductor substrate. The implanted region has a concentration of more than double an amount of impurities as impurities in the channel region.
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申请公布号 |
US7880263(B2) |
申请公布日期 |
2011.02.01 |
申请号 |
US20080238256 |
申请日期 |
2008.09.25 |
申请人 |
SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION |
发明人 |
YANG HAE WANG |
分类号 |
H01L29/00;H01L21/76 |
主分类号 |
H01L29/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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