Method and apparatus for measuring and compensating for static phase error in phase locked loops

摘要

A method and circuit for static phase error measurement includes a reference clock delay chain having a selectable number of delay elements. A number of the delay elements are enabled in accordance with a select length signal to delay a reference clock signal. A feedback signal delay chain also has a selectable number of delay elements. A number of the delay elements are enabled in accordance with a select length signal to delay a feedback signal. A latch tests phase alignment between the delayed reference clock signal and the delayed feedback signal and outputs a measurement of static phase error.