发明名称 FINITE AUTOMATON GENERATION SYSTEM FOR STRING MATCHING FOR MULTI-BYTE PROCESSING
摘要 An NFA circuit adapted to regular expressions and used for multibyte processing enables independent check of in what position the inputted character string matches. A 1-byte NFA converting unit (21) stores one or more regular expressions inputted by an input device (1) in a regular expression storage unit (31), sequentially reads out the regular expressions, and converts them into 1-byte processed NFAs with no &egr; transition. A multibyte NFA converting unit (22) converts the generated 1-byte processed NFAs into NFAs such that it can be judged in what position the inputted character string to be processed in multibyte matches a pattern on the basis of the operating mode and the number of processing bytes inputted by the input device (1) and processed and stores the NFAs in an NFA storage unit (32). An HDL converting unit (23) generates a hardware description language (HDL) of the NFA circuit from the state transition information relating to the NFAs inputted from a multibyte NFA converting unit (22).
申请公布号 US2011022617(A1) 申请公布日期 2011.01.27
申请号 US20090933504 申请日期 2009.03.19
申请人 YAMAGAKI NORIO 发明人 YAMAGAKI NORIO
分类号 G06F17/30 主分类号 G06F17/30
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