发明名称 METHOD OF FABRICATING DUAL DAMASCENE STRUCTURE
摘要 A method of fabricating a dual damascene structure is described. A dielectric layer and a metal hard mask layer are sequentially formed on a substrate having thereon a conductive layer and a liner layer. The metal hard mask layer and the dielectric layer are patterned to form a via hole exposing a portion of the liner layer. A gap-filling layer is filled in the via hole, having a height of ¼ to ½ of the depth of the via hole. A trench is formed in the metal hard mask layer and the dielectric layer. The gap-filling layer is removed to expose the portion of the liner layer, which is then removed. A metal layer is formed filling in the via hole and the trench, and then the metal hard mask layer is removed.
申请公布号 US2011021021(A1) 申请公布日期 2011.01.27
申请号 US20100897073 申请日期 2010.10.04
申请人 UNITED MICROELECTRONICS CORP. 发明人 CHANG KUANG-YEH;MA HONG
分类号 H01L21/4763 主分类号 H01L21/4763
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