A NOVEL HIGH SPEED TWO TRANSISTOR/TWO BIT NOR READ ONLY MEMORY

摘要

A mask programmable NOR ROM circuit includes serially connected ROM transistors. A drain of a topmost ROM transistor is connected to a bit line and a source of a bottommost ROM transistor is connected to a source line. A source of one ROM transistor is solely connected with a drain of an immediately adjacent ROM transistor. The ROM transistors are programmed by placing a resist mask having openings for selectively modifying a first threshold voltage level of chosen ROM transistors by implanting a threshold voltage modifying impurity. A selected ROM transistor is read by connecting the source line to a sense amplifier circuit and setting the bit line to a read biasing voltage level. The gate of the selected ROM transistor is set to a moderately high read voltage level. The gates of all unselected ROM transistor is set to a very high read voltage level.