| 摘要 |
<p>Fully-differential, switched-capacitor circuit having a first and second input terminal (5a, 5b), and including: an operational amplifier (2, 41) having a first and a second differential input (4a, 4b), a first and a second output terminal (8a, 8b) and a bias control terminal (17); a feedback network (9a, 9b), connected between the differential outputs (8a, 8b) and the input terminals (5a, 5b), and having intermediate nodes connected to the differential inputs (4a, 4b) of the operational amplifier (2, 41); and a control circuit (3), including a detection network (19) and an error amplifier (20, 21). The error amplifier (20) has a first input receiving a desired common-mode voltage (VXID), and an output connected to the bias control terminal (17) and supplying a control voltage (VXC). The detection network (19) has a first and a second input connected directly, respectively, to the second input terminal (4a, 4b) of the operational amplifier (2, 41), and an output connected to a second input of the error amplifier (20), and supplying a common-mode drive voltage (VXCM). <IMAGE></p> |
