| 摘要 |
<p>A Power Management Integrated Circuit (PMIC), which is operable in use to provide a plurality of power states, is arranged to provide a predetermined delay before a power state transition begins. The delay, which is preferably configurable and may be of zero duration, is applied between receipt by the PMIC of a power state transition command and the start of the power state transition itself. The power transition command may also result in the output of a power transition indication signal, e.g. an interrupt to a processor. A power state transition may comprise a power state transition sequence under the control of a sequencer. The PMIC may also be arranged to control power converters (power blocks) that are external to the PMIC. Also disclosed is the translation of control settings, from one power block to another, to simultaneously change the output of both power blocks with a single update.</p> |
