发明名称 METHOD OF DESIGNING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method of designing a semiconductor device capable of reducing dynamic power supply current and static power supply current of a scan FF depending on no operation specification of the scan FF during normal operation. SOLUTION: In the method of designing the semiconductor device, an RTL a circuit configuration of the semiconductor device is described by HDL, a target library memorizing a plurality of scan FF the configurations of an output section and the threshold voltages of transistor are differ, and constraint information are used to implement logic synthesis, so that a netlist of gate level is generated. A transistor composing the output section of usual FF selected according to timing margin of a usual FF of the netlist is replaced with a transistor the threshold voltage of which is higher than usual, and the usual FF with the scan FF. A scan chain is inserted, so that a transistor composing the output section of the scan FF connected only to the scan chain of the netlist inserted by the scan chain is replaced with a transistor the threshold voltage of which is higher than usual. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008026256(A) 申请公布日期 2008.02.07
申请号 JP20060201915 申请日期 2006.07.25
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 ISHIZUKA KAZUTOSHI
分类号 G01R31/28;G06F17/50 主分类号 G01R31/28
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