发明名称 TLB PREFETCHING
摘要 In an embodiment, a memory management unit (MMU) is configured to retain a block of data that includes multiple page table entries. The MMU is configured to check the block in response to TLB misses, and to supply a translation from the block if the translation is found in the block without generating a memory read for the translation. In some embodiments, the MMU may also maintain a history of the TLB misses that have used translations from the block, and may generate a prefetch of a second block based on the history. For example, the history may be a list of the most recently used Q page table entries, and the history may show a pattern of access that are nearing an end of the block. In another embodiment, the history may comprise a count of the number of page table entries in the block that have been used.
申请公布号 WO2011008702(A1) 申请公布日期 2011.01.20
申请号 WO2010US41728 申请日期 2010.07.12
申请人 APPLE INC.;WANG, JAMES;CHEN, ZONGJIAN 发明人 WANG, JAMES;CHEN, ZONGJIAN
分类号 G06F12/10 主分类号 G06F12/10
代理机构 代理人
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