发明名称 MULTIBIT RECYCLIC PIPELINED ADC ARCHITECTURE
摘要 An apparatus is provided. The apparatus comprises a sample switch, a sampling capacitor, an amplifier, feedback branches, a second hold switch, an N-bit converter pair, a third hold switch, and an M-bit converter pair. The sample receives an input signal and is actuated by a sample signal. The sampling capacitor is coupled to the sample switch. The amplifier has a first input terminal that is coupled to the sampling capacitor. The feedback branches are coupled between the output terminal of the amplifier and the first input terminal of the amplifier, with each feedback branch including a feedback capacitor, and a first hold switch that is coupled to the feedback capacitor. The second hold switch is coupled to the sampling switch. The N-bit converter pair is coupled to the sampling switch and to the second hold switch. The third hold switch is coupled to at least one of the feedback branches, and the M-bit converter pair is coupled to the output terminal of the amplifier and to the third hold switch.
申请公布号 US2011012764(A1) 申请公布日期 2011.01.20
申请号 US20090639705 申请日期 2009.12.16
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 VENKATARAMAN JAGANNATHAN;PENTAKOTA VISVESVARAYA A.;OSWAL SANDEEP K.;MODI SAMARTH S.;DUSAD SHAGUN
分类号 H03M1/00;H03M1/12 主分类号 H03M1/00
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