发明名称 Processor and address translating method
摘要 <p>An address translation buffer of a processor including a memory unit that has a first area with first entries storing first address translation pairs of a virtual address and a physical address corresponding to the virtual address, each of the first address translation pairs is subjected to a index tag which is a part of the virtual address, and a second area with second entries storing second address translation pairs, each of the second address translation pairs is subjected to a whole part of the virtual address, and a search unit that searches the first area for an address translation pair by using a index tag included in a virtual address to be translated, and searches the second area for the address translation pair by using a whole part of the virtual address when the address translation pair is not found in the first area.</p>
申请公布号 EP2275939(A1) 申请公布日期 2011.01.19
申请号 EP20100167869 申请日期 2010.06.30
申请人 FUJITSU LIMITED 发明人 MARUYAMA, MASAHARU
分类号 G06F12/10 主分类号 G06F12/10
代理机构 代理人
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