| 摘要 |
A method of electrically-conductive via formation in a fully processed wafer involves defining at least one trench area on a backside of the fully processed wafer, forming at least one trench within the trench area to an overall depth that will allow for a via formed within the trench to be seeded over its full length, forming the via within the trench into the fully processed wafer to a predetermined depth, depositing a seed layer over the full length of the via, and plating the seed layer to fill the via with an electrically-conductive metal.
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