发明名称 Low-Leakage Power Supply Architecture for an SRAM Array
摘要 A method of forming an integrated circuit structure includes providing a chip; forming a static random access memory (SRAM) cell including a transistor on the chip; and forming a bias transistor configured to gate a power supply voltage provided to the SRAM cell on the chip. The bias transistor and the transistor of the SRAM cell are formed simultaneously.
申请公布号 US2011007596(A1) 申请公布日期 2011.01.13
申请号 US20100775220 申请日期 2010.05.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 LEE CHENG HUNG;CHEN HSU-SHUN;CHAN WEI MIN;CHOU SHAO-YU
分类号 G11C5/14;G11C11/00;H01L21/8234 主分类号 G11C5/14
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