发明名称 MEMORY SYSTEM
摘要 A memory system that can efficiently relieve a large number of defective bits with a small number of redundant bits is provided in a Flash-EEPROM nonvolatile memory. A memory system according to an embodiment of the present invention comprises a Flash-EEPROM memory in which a plurality of memory 5 having a floating gate or a charge trapping layer and capable of electrically erasing and writing data are arranged; a control circuit that controls a cache memory and the Flash-EEPROM memory; and an interface circuit that communicates with outside, wherein a plurality of group data and a plurality of flag data for storing presence of inversion of all bits of respective group data are stored in a memory area of the Flash-EEPROM memory.
申请公布号 US2011010606(A1) 申请公布日期 2011.01.13
申请号 US20080673904 申请日期 2008.08.07
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TAKASHIMA DAISABURO
分类号 G06F11/16;G06F12/00;G06F12/02 主分类号 G06F11/16
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